DAQ Testing/20180729

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July 29th, 2018 Testers: Cameron and Chandan

See Today's Meeting Notes

Goals

  • Test HAPPEX and QWeak ADCs in All Parity DAQ for functionality and dynamic range
  • Correct RJ45 cable in RHRS placement

Move RampTest functionality to dedicated .crl file

  • Moved the newly written ramping behavior to a new .crl file (RampTest.crl) and returned Prex_ts.crl to its original state
  • When including rampdac12 flag in userlist for Counting House it causes the roc (23) to die
  • The injector .crl is different for some reason (looking at Prex_ts.crl as the starting point) - will it allow us to set the rampdac12 function there too or can it change to the new RampTest.crl file just fine?
  • Runs 4068 - 4073 determine that the rampdac12 variable can be set for both HRSs, even simultaneously, and it will only ramp on the one that has the rampdac12 flag included for it to actually ramp that HAPTB
    • 4068 crashes counting house roc 23 after exactly 1000 events (so it is the first pass of changing the HAPPEX ADCs gains that is causing issues) - requires entire ROC reboot
    • 4069 also crashes, no change to inputs (double check issue)
    • 4070 re-tests prior functioning config - works just fine
    • 4071 fails when only asking the counting house to ramp by itself
    • 4072 tests just LHRS by itself, and it works just fine
    • 4073 tests both R and LHRS simultaneously, and they both work together just fine (new standard testing config)
      • Importantly, the rampdac12 setting only affects the HRS that it is set to - the RHRS doesn't see any ramping when only LHRS is turned on (RHRS still has the second HAPPEX ADC, 4th channel plugged in, and we saw ramping for 4070 and 4073 as expected)
      • So this means that the rampdac12 variable only affects the sub-sections that the cedit config files let them know about
      • So somehow the .crl's are local, even though they appear to be executables that run for the whole experiment - multiple copies exist?
    • So we don't understand why the Counting House is misbehaving, or whether the Injector can be easily included

Testing ADCs

We will test the available ADCs in the hall first, since our access to HRS huts may be restricted during the week

Testing LHRS DAQ

Calibrate 12 and 16 bit DACs

  • 12 Bit DAC on LHRS
    • Level = 400 -> Voltage = 0.97V
    • Level = 800 -> Voltage = 1.95V
    • Level = 1200 -> Voltage = 2.92V
    • Level = 1600 -> Voltage = 3.90V
    • Level = 2000 -> Voltage = 4.88V
    • Level = 2100 -> Voltage = 5.12V
    • Level = 2400 -> Voltage = 5.85V
    • Level = 2800 -> Voltage = 6.83V
    • Level = 3000 -> Voltage = 7.32V
    • Functional Voltage = 0.00244152 Volts/Level * Level Value -0.0063 Volts
  • 16 Bit DAC on LHRS HAPTB
    • Level = 400 -> Voltage = -4.92V
    • Level = 2000 -> Voltage = -4.69V
    • Level = 4000 -> Voltage = -4.39V
    • Level = 8000 -> Voltage = -3.78V
    • Level = 12000 -> Voltage = -3.16V
    • Level = 16000 -> Voltage = -2.55V
    • Level = 20000 -> Voltage = -1.94V
    • Level = 24000 -> Voltage = -1.32V
    • Level = 28000 -> Voltage = -0.72V
    • Level = 32000 -> Voltage = -0.11V
    • Level = 36000 -> Voltage = 0.48V
    • Level = 40000 -> Voltage = 1.10V
    • Level = 44000 -> Voltage = 1.71V
    • Level = 48000 -> Voltage = 2.32V
    • Level = 52000 -> Voltage = 2.93V
    • Level = 56000 -> Voltage = 3.54V
    • Level = 60000 -> Voltage = 4.15V
    • Level = 64000 -> Voltage = 4.76V
    • Functional Voltage = 0.000152338 Volts/Level * Level Value - 4.99066 Volts

LHRS HAPPEX ADCs

Use the same rampdac12 settings as on the RHRS to calibrate the LHRS

  • LHRS "adcx0" according to tape label = first ADC on the left (of two options) of the 18bit ADC crate; address = 0 in ROC25 crate, name = adcx4 in ~/bpan18/pan/control.db
    • First channel test - RampTest using rampdac12
      • Run number 4074 - int = 3, conv = 2 optimizes
    • Second channel test - RampTest using rampdac12
      • Run number 4075 - int = 3, conv = 2 optimizes
    • Third channel test - RampTest using rampdac12
      • Run number 4076 - int = 3, conv = 2 optimizes
    • Fourth channel test - RampTest using rampdac12
      • Run number 4077 - int = 3, conv = 2 optimizes
  • LHRS "adcx11" according to tape label = second ADC (of two options), on the right, of the 18bit ADC crate; address = 1 in ROC25 crate, name = adcx5 in ~/bpan18/pan/control.db
    • First channel test - RampTest using rampdac12
      • Run number 4078 - int = 3, conv = 2 optimizes
    • Second channel test - RampTest using rampdac12
      • Run number 4079 - int = 3, conv = 2 optimizes
    • Third channel test - RampTest using rampdac12
      • Run number 4082 (lost a few runs to editing crl file on accident) - int = 3, conv = 2 optimizes
    • Fourth channel test - RampTest using rampdac12
      • Run number 4083 - int = 3, conv = 2 optimizes

LHRS QWeak ADCs

Testing the QWeak ADCs

  • We need to add a new Ramp function for the 16 bit DACs on the HAPTBs
    • We copy the functionality from the 12 bit ramp function
    • Add in a new usrstrutils.c variable for 16 bit ramping
    • Remove gain settings and set the min and max DAC values to 100 and 64100, midvalues = 16100, 32100, and 48100
    • We should see 3 flat lines at -2.5, 0, and +2.5 volts, and it should start at -5V and wrap back around (DAC level) at 5V
      • We are having issues with CODA not wanting to connect properly (LHRS, RHRS, Injector, and Trigger Supervisor ROC died for some reason)
      • Running old Prex_ts.crl config works - Run 4086 works just fine
      • Running new RampTest (with rampdac16 set on LHRS) - Run 4087 appears to miss our 20 flat steps
      • Running new RampTest (with an echo too) - Run 4088 doesn't echo our echo
      • Update condition to stop at step # 512 should print - Run 4089, and it does
    • Evaluation:
      • So we are happy that the ADCs just magically don't ever saturate and turn over from + ADC channels to exactly 0 with the switch from negative to positive voltage
      • Somehow pedestal is exactly the maximum value possible in the ADC)
      • Saturation would mean that the large + or - value would e
    • Run 4104 - Channel - 0-2000 events - ncroach into the middle and flatline/saturate at the ~32000 ADC channel range (QWeak ADCs do some weird offset to use their full range I guess)
  • QWeak ADC (only one in LHRS) - vqwk5 (in control.db) - testing all channels with one simple ramp with no features - run number 4090
    • Using "./runpan 4090" - set the max exvnts in the script itself
    • First channel (channel 0) - 0 to 1200 events - good (labeling the channels by their PAN data labels, not the numbers on the crate - add +1 for those numbers - starting from the bottom and working up)
    • Run 4090 - Channel 1 - 1200-2400 events - good
    • Run 4090 - Channel 2 - 2400-3500 events - good
    • Run 4090 - Channel 3 - 3500-4600 events - good
    • Run 4090 - Channel 4 - 4600-5700 events - good
    • Run 4090 - Channel 5 - 5700-6700 events - good
    • Run 4090 - Channel 6 - 6700-7700 events - good
    • Run 4090 - Channel 7 - 7700-9000 events - good

RHRS QWeak ADCs

  • QWeak ADC 0 in RHRS (left most one in the crate) - vqwk6 (in control.db) - similar to LHRS case - run number 4091 and 4092 (written "1" on the bottom label)
    • Run 4091 - Channel 0 - 0-1000 events - good
    • Run 4092 - Channel 1 - 0-1200 events - good
    • Run 4092 - Channel 2 - 1200-2400 events - good
    • Run 4092 - Channel 3 - 2400-3500 events - good
    • Run 4092 - Channel 4 - 3500-4900 events - bad - has absolutely no signal, and has tape over it - should be condemned
    • Run 4092 - Channel 5 - 4900-6200 events - bad - positive voltage range has non-linearities, and pedestal is at 0 instead of +limit - should be condemned
    • Run 4092 - Channel 6 - 6200-7300 events - good
    • Run 4092 - Channel 7 - 7300-8500 events - good
  • QWeak ADC 1 in RHRS (second one, its on the right in the crate) - vqwk7 (in control.db) - run number 4093 (written "29" on the bottom label)
    • Run 4093 - Channel 0 - 0-1100 events - good
    • Run 4093 - Channel 1 - 1100-2200 events - good - pedestal is low instead of high, possibly because a channel was plugged in at time of data taking
    • Run 4093 - Channel 2 - 2300-3400 events - good
    • Run 4093 - Channel 3 - 3400-4500 events - good
    • Run 4093 - Channel 4 - 4500-5800 events - good
    • Run 4093 - Channel 5 - 5800-6900 events - good - pedestal is low instead of high, possibly because a channel was plugged in at time of data taking
    • Run 4093 - Channel 6 - 6900-7800 events - good
    • Run 4093 - Channel 7 - 7800-8900 events - good - pedestal is low instead of high, possibly because a channel was plugged in at time of data taking

TS Signal from RHRS into LHRS

We re-ran the flat RJ45 cable from the RHRS TS output down the detector hut - tied it off in multiple places and provided some slack (unhook from power box to get more slack) - run 4095 shows first half dead (cable inserted upside down) and second half good (corrected cable)

Testing Counting House DAC

Done after measuring the QWeak ADCs Calibrate 12 and 16 bit DACs

  • 12 Bit DAC in Counting House
    • Level = 400 -> Voltage = 0.97V
    • Level = 800 -> Voltage = 1.99V
    • Level = 1200 -> Voltage = 2.92V
    • Level = 1600 -> Voltage = 3.90V
    • Level = 2000 -> Voltage = 4.88V
    • Level = 2100 -> Voltage = 5.12V
    • Level = 2400 -> Voltage = 5.85V
    • Level = 3000 -> Voltage = 7.32V
    • Functional Voltage = x Volts/Level * Level Value -y Volts
  • 16 Bit DAC on LHRS HAPTB
    • Level = 400 -> Voltage = -4.94V
    • Level = 100 -> Voltage = -4.98V
    • Level = 2000 -> Voltage = -4.68V
    • Level = 4000 -> Voltage = -4.37V
    • Level = 8000 -> Voltage = -4.08V
    • Level = 12000 -> Voltage = -3.16V
    • Level = 160000 -> Voltage = -2.55V
    • Level = 20000 -> Voltage = -1.94V
    • Level = 24000 -> Voltage = -1.32V
    • Level = 28000 -> Voltage = -0.72V
    • Level = 32000 -> Voltage = -0.11V
    • Level = 36000 -> Voltage = 0.48V
    • Level = 40000 -> Voltage = 1.10V
    • Level = 44000 -> Voltage = 1.71V
    • Level = 48000 -> Voltage = 2.32V
    • Level = 52000 -> Voltage = 2.93V
    • Level = 56000 -> Voltage = 3.54V
    • Level = 60000 -> Voltage = 4.15V
    • Level = 64000 -> Voltage = 4.76V
    • Functional Voltage = x Volts/Level * Level Value - y Volts

Counting House QWeak ADCs

  • QWeak ADC 0 in Counting House (left most one in the crate) - vqwk0 (in control.db) - similar to LHRS and RHRS case - run number 4096 and 4097
    • Run 4096 - Channel 0 - 0-1000 events - good (channel number as in PAN, not as labelled physically - add +1 for that)
    • Run 4097 - Channel 1 - 0-1500 events - good
    • Run 4097 - Channel 2 - 1500-3000 events - good
    • Run 4097 - Channel 3 - 3000-4500 events - good
    • Run 4097 - Channel 4 - 4500-5800 events - good
    • Run 4097 - Channel 5 - 5800-7500 events - good
    • Run 4097 - Channel 6 - 7500-9200 events - good
    • Run 4097 - Channel 7 - 9300-10500 events - good
  • QWeak ADC 1 in Counting House (second from left in the crate) - vqwk1 (in control.db) - run number 4098
    • Run 4098 - Channel 0 - 0-1200 events - good
    • Run 4098 - Channel 1 - 1400-2600 events - good
    • Run 4098 - Channel 2 - 2800-4000 events - good
    • Run 4098 - Channel 3 - 4300-5500 events - good
    • Run 4098 - Channel 4 - 5900-7200 events - bad - saturates around 210000 ADC channels - start a new run to double check
    • Run 4098 - Channel 5 - 7400-8600 events - bad - saturates
    • Run 4098 - Channel 6 - 8900-10100 events - bad - saturates
    • Run 4098 - Channel 7 - 10400-11600 events - bad - saturates
    • Run 4099 - Channel 3 - 0-1500 events - good (as expected)
    • Run 4099 - Channel 4 - 1700-2900 events - bad - saturates
    • Run 4099 - Channel 5 - 3100-4200 events - bad - saturates
    • Run 4099 - Channel 6 - 4600-5900 events - bad - saturates
    • Run 4099 - Channel 7 - 6000-7200 events - bad - saturates
  • QWeak ADC 2 in Counting House (third from left in the crate) - vqwk2 (in control.db) - run number 4100
    • Run 4100 - Channel 0 - 0-1200 events - good
    • Run 4100 - Channel 1 - 1200-2500 events - bad - has highly nonlinear behavior
    • Run 4100 - Channel 2 - 2800-4000 events - bad - has highly nonlinear behavior
    • Run 4100 - Channel 3 - 4100-5300 events - bad - saturated
    • Run 4100 - Channel 4 - 5400-6400 events - good
    • Run 4100 - Channel 5 - 6500-7800 events - good
    • Run 4100 - Channel 6 - 8000-9200 events - good
    • Run 4100 - Channel 7 - 9500-10800 events - good
    • Run 4101 - Channel 0 - 0-1200 events - good - as expected
    • Run 4101 - Channel 1 - 1600-3200 events - bad - has highly nonlinear behavior
    • Run 4101 - Channel 2 - 3800-5000 events - bad - has highly nonlinear behavior
    • Run 4101 - Channel 3 - 5600-6800 events - bad - saturated
    • We are having problems keeping the ROCs booted
    • CODA is having a really hard time staying on and starting a new run without having to reset everything and restarting CODA for each new run
  • QWeak ADC 3 in Counting House (fourth from left in the crate) - vqwk3 (in control.db) - run number 4100
    • Run 4102 - Channel 0 - 0-1200 events - good - could stand to have higher gain - other channels are a factor of 3 larger or more
    • Run 4102 - Channel 1 - 1300-2500 events - good - offset x?
    • Run 4102 - Channel 2 - 2600-3800 events - good
    • Run 4102 - Channel 3 - 4200-5500 events - good - offset x?
    • Run 4102 - Channel 4 - 5700-6900 events - good
    • Run 4102 - Channel 5 - 7100-8300 events - good - offset x?
    • Run 4102 - Channel 6 - 8500-9700 events - good
    • Run 4102 - Channel 7 - 10400-11600 events - good - offset x?
    • For some reason every other channel sets the event number on the x axis back to the previous channel's starting point - PAN messed up the x axis?
  • QWeak ADC 4 in Counting House (fourth from left in the crate) - vqwk4 (in control.db) - run number 4100
    • Run 4103 - Channel 0 - 0-1200 events - bad - saturates
    • Run 4103 - Channel 1 - 1300-2500 events - bad - saturates
    • Run 4103 - Channel 2 - 2700-3900 events - bad - saturates
    • Run 4103 - Channel 3 - 4000-5200 events - bad - saturates
    • Run 4103 - Channel 4 - 5400-6600 events - bad - saturates
    • Run 4103 - Channel 5 - 6900-8100 events - bad - saturates
    • Run 4103 - Channel 6 - 8400-9600 events - bad - saturates
    • Run 4103 - Channel 7 - 10300-11500 events - bad - saturates
    • Run 4104 - Channel 7 - 0-2000 events - bad - saturates - trying again
    • Run 4104 - Channel 3 - 2000-3400 events - bad - saturates
    • Run 4104 - Channel 0 - 3500-4800 events - bad - saturates
    • Maybe something is just wrong
  • Summary
    • Many of the Counting House QWeak ADC channels have problems or saturate always (no intermediate saturations), and one whole board (the last one) is just bad

Result

  • We made a new .crl for our RampTest function, and we developed a ramp function and user string flag specifically for the 16 bit DAC ramp test
  • We have finished testing every single HAPPEX and QWeak ADC channel in the LHRS and RHRS, and every QWeak ADC in the Counting House (we can't get the rampdac12 function to work with the counting house included in the .crl - needs help)
  • We did not have access to the Injector, and so we could not test those QWeak ADCs
  • We found that all HAPPEX ADC channels tested work
  • Many QWeak ADC channels, especially in the Counting House DAQ, do not work or behave highly non-linearly
  • We moved the RJ45 cable to a better spot

To Do

  • (JAPAN?) Perfect and better justify parameters in Ramp testing function
  • Check if something like int = 2 and conv = 0 is actually a more suitable gain setting for HAPPEX ADCs
  • Put all of the DAQ software into a JeffersonLab repository and track it adequately
  • (JAPAN?) Develop a similar ramping function but to use a constant DAC value and systematically scan the gain settings to understand the linearity, starting points, and relative significance of Integrator and Conversion gains for HAPPEX ADCs
  • Do the QWeak ADCs in the Injector and verify issues with the ones in the Counting House + figure out how to test the Counting House HAPPEX ADCs
  • Make a map of all channels and logic
  • Characterize and test all scaler channels