DAQ Testing/20190122

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January 22nd, 2019 Testers: Cameron Clarke, Paul King

Goals

  • Investigate Injector DAQ LNE curiosities
  • Getting Japan to work with synchronization test and perfect veto

Injector DAQ LNE Curiosities

Paul King and Cameron went to the injector service building and started working on replicating prior tests of the injector DAQ scaler LNE signals. Two problems occurred that prevented progress - the DAQ toolboxes and cables have all disappeared, and Caryn started a run remotely without warning us, which killed our instance of CODA and prompted us to move on to the counting house.

Note: Do not dangle copies of HEL from FIFOs, even if they are unplugged from things they will act like antennas and broadcast the helicity information. Note: We should force the vqwk's to be vetoed during the first 5 or so events to prevent vqwk read/write errors at DAQ startup.

  • Run 1037 - injector standalone mode, works, using 30 Hz timing
  • Run 1038 - Caryn tests injector mode too

Counting House Synchronization Test Updates in JAPAN

Paul King and Cameron went to the counting house to look at the synchronization test setup that Cameron and Tao developed before.

  • Paul moved the synch test gates from the LeCroy 622 Quad Coincidence (AND mode) and moved it to a Philips 756 logic quad coincidence module with a gate-veto rather than a gate AND
    • We use the gate veto s.t. the signal is true during the gate is f1 (the bottom signal in the modules)
    • Run 1039 - f2 had some issues, but using his logic module does prevent the multiple counting of sliced pulses from happening now, which was the goal of switching modules
  • Added a Tsettle veto on the V2F signal itself so that it will not have a race condition hopefully - so that the prior random DAC value won't matter (this is still a problem though because the DAC value is set significantly later than the falling edge of Tsettle)
    • Run 1040 - works now
  • Put it back to 1039 now, with no veto
    • Run 1041 - works again
  • Now we put instead a SIS3801 control bit Tsettle veto (just in the CH crate this time) to see if counts decrease appropriately (i.e. the veto works)
    • Run 1042 - works
    • Run 1043 - look at the DAC on a scope - the HAPTB voltage level change is about 190 us after Tsettle, so this is why a vetoed CH scaler count isn't proportional to a non-vetoed HRS count
      • A cable was unplugged during the run, so the signal is saturated in one spot
  • Status: The counting house crate scaler is Tsettle vetoed, and so the HRS scalers should also be soon
    • Run 1044 - injector reset test - worked
    • Run 1098 - came back on the 23rd of January and plugged in Tsettle vetoes to the HRS SIS3801 scalers and took a new run - now the synch test plots show the timing to be approximately perfectly centered at 0, with a bit of noise
    • Run 1099 - reset injector test - worked

Conclusions

  • The synch test with scalers works, and can be analyzed in JAPAN
  • Some more work should be done to fully understand what is going on with the signals and to ensure that the timing is reasonable, but for now it looks good enough, especially with the Tsettle vetoing, even with the 190 us delay from HAPTB (as long as 30Hz keeps 500 us Tsettle timing)