Difference between revisions of "DAQ Meeting/20180802"
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Jump to navigationJump to search (Created page with "* Editing .crl's to have Banks ** Don't edit all of it at once, Banks and Headers can coexist, so going one step at a time is fine ** |= means leave bits there alone, and add...") |
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* Update timing for FLEXIO in Injector DAQ | * Update timing for FLEXIO in Injector DAQ | ||
** Jack Segal's webpage (~segal) has every user manual of every module (see phillips 795 gate generator manual, also available on [http://www.phillipsscientific.com/pdf/794ds.pdf Phillips website]) | ** Jack Segal's webpage (~segal) has every user manual of every module (see phillips 795 gate generator manual, also available on [http://www.phillipsscientific.com/pdf/794ds.pdf Phillips website]) | ||
+ | ** Program jumper may be placed in the wrong setting - it sits on the back of the module and selects a single output to send the delay |
Revision as of 10:37, 2 August 2018
- Editing .crl's to have Banks
- Don't edit all of it at once, Banks and Headers can coexist, so going one step at a time is fine
- |= means leave bits there alone, and add in some new bit
- b0b444 is the begin of event header flag
- Just add one bank at a time and it compiles just fine
- Adding in TS control flag
- Diff the Prex_ts.crl and Prex.crl to see what ts control addition does
- Ask Dave Abbott about what to do to get a preprocesessor directive in there to simplify life
- Update timing for FLEXIO in Injector DAQ
- Jack Segal's webpage (~segal) has every user manual of every module (see phillips 795 gate generator manual, also available on Phillips website)
- Program jumper may be placed in the wrong setting - it sits on the back of the module and selects a single output to send the delay