DAQ Testing/20180729

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Main Page - DAQ Testing - July 29th, 2018 Testers: Cameron and Chandan

Goals

  • Test HAPPEX and QWeak ADCs in All Parity DAQ for functionality and dynamic range
  • Correct RJ45 cable in RHRS placement

Move RampTest functionality to dedicated .crl file

  • Moved the newly written ramping behavior to a new .crl file (RampTest.crl) and returned Prex_ts.crl to its original state
  • When including rampdac12 flag in userlist for Counting House it causes the roc (23) to die
  • The injector .crl is different for some reason (looking at Prex_ts.crl as the starting point) - will it allow us to set the rampdac12 function there too or can it change to the new RampTest.crl file just fine?
  • Runs 4068 - 4073 determine that the rampdac12 variable can be set for both HRSs, even simultaneously, and it will only ramp on the one that has the rampdac12 flag included for it to actually ramp that HAPTB
    • 4068 crashes counting house roc 23 after exactly 1000 events (so it is the first pass of changing the HAPPEX ADCs gains that is causing issues) - requires entire ROC reboot
    • 4069 also crashes, no change to inputs (double check issue)
    • 4070 re-tests prior functioning config - works just fine
    • 4071 fails when only asking the counting house to ramp by itself
    • 4072 tests just LHRS by itself, and it works just fine
    • 4073 tests both R and LHRS simultaneously, and they both work together just fine (new standard testing config)
      • Importantly, the rampdac12 setting only affects the HRS that it is set to - the RHRS doesn't see any ramping when only LHRS is turned on (RHRS still has the second HAPPEX ADC, 4th channel plugged in, and we saw ramping for 4070 and 4073 as expected)
      • So this means that the rampdac12 variable only affects the sub-sections that the cedit config files let them know about
      • So somehow the .crl's are local, even though they appear to be executables that run for the whole experiment - multiple copies exist?
    • So we don't understand why the Counting House is misbehaving, or whether the Injector can be easily included

Testing ADCs

We will test the available ADCs in the hall first, since our access to HRS huts may be restricted during the week

Testing LHRS ADCs

  • Calibrate 12 and 16 bit DACs
    • 12 Bit DAC on LHRS
      • Level = 400 -> Voltage = 0.97V
      • Level = 800 -> Voltage = 1.95V
      • Level = 1200 -> Voltage = 2.92V
      • Level = 1600 -> Voltage = 3.90V
      • Level = 2000 -> Voltage = 4.88V
      • Level = 2100 -> Voltage = 5.12V
      • Level = 2400 -> Voltage = 5.85V
      • Level = 2800 -> Voltage = 6.83V
      • Level = 3000 -> Voltage = 7.32V
      • Functional Voltage = 0.00244152 Volts/Level * Level Value -0.0063 Volts
    • 16 Bit DAC on LHRS HAPTB
      • Level = 400 -> Voltage = -4.92V
      • Level = 2000 -> Voltage = -4.69V
      • Level = 4000 -> Voltage = -4.39V
      • Level = 8000 -> Voltage = -3.78V
      • Level = 12000 -> Voltage = -3.16V
      • Level = 16000 -> Voltage = -2.55V
      • Level = 20000 -> Voltage = -1.94V
      • Level = 24000 -> Voltage = -1.32V
      • Level = 28000 -> Voltage = -0.72V
      • Level = 32000 -> Voltage = -0.11V
      • Level = 36000 -> Voltage = 0.48V
      • Level = 40000 -> Voltage = 1.10V
      • Level = 44000 -> Voltage = 1.71V
      • Level = 48000 -> Voltage = 2.32V
      • Level = 52000 -> Voltage = 2.93V
      • Level = 56000 -> Voltage = 3.54V
      • Level = 60000 -> Voltage = 4.15V
      • Level = 64000 -> Voltage = 4.76V
      • Functional Voltage = 0.000152338 Volts/Level * Level Value - 4.99066 Volts
  • Use the same rampdac12 settings as on the RHRS to calibrate the LHRS
    • LHRS "adcx0" according to tape label = first ADC on the left (of two options) of the 18bit ADC crate; address = 0 in ROC25 crate, name = adcx4 in ~/bpan18/pan/control.db
      • First channel test - RampTest using rampdac12
        • Run number 4074 - int = 3, conv = 2 optimizes
      • Second channel test - RampTest using rampdac12
        • Run number 4075 - int = 3, conv = 2 optimizes
      • Third channel test - RampTest using rampdac12
        • Run number 4076 - int = 3, conv = 2 optimizes
      • Fourth channel test - RampTest using rampdac12
        • Run number 4077 - int = 3, conv = 2 optimizes
    • LHRS "adcx11" according to tape label = second ADC (of two options), on the right, of the 18bit ADC crate; address = 1 in ROC25 crate, name = adcx5 in ~/bpan18/pan/control.db
      • First channel test - RampTest using rampdac12
        • Run number 4078 - int = 3, conv = 2 optimizes
      • Second channel test - RampTest using rampdac12
        • Run number 4079 - int = 3, conv = 2 optimizes
      • Third channel test - RampTest using rampdac12
        • Run number 4082 (lost a few runs to editing crl file on accident) - int = 3, conv = 2 optimizes
      • Fourth channel test - RampTest using rampdac12
        • Run number 4083 - int = 3, conv = 2 optimizes
  • Testing the QWeak ADCs
    • We need to add a new Ramp function for the 16 bit DACs on the HAPTBs
      • We copy the functionality from the 12 bit ramp function
      • Add in a new usrstrutils.c variable for 16 bit ramping
      • Remove gain settings and set the min and max DAC values to 100 and 64100, midvalues = 16100, 32100, and 48100
      • We should see 3 flat lines at -2.5, 0, and +2.5 volts, and it should start at -5V and wrap back around (DAC level) at 5V
        • We are having issues with CODA not wanting to connect properly (LHRS, RHRS, Injector, and Trigger Supervisor ROC died for some reason)
        • Running old Prex_ts.crl config works - Run 4086 works just fine
        • Running new RampTest (with rampdac16 set on LHRS) - Run 4087 appears to miss our 20 flat steps
        • Running new RampTest (with an echo too) - Run 4088 doesn't echo our echo
        • Update condition to stop at step # 512 should print - Run 4089, and it does
      • Evaluation:
        • So we are happy that the ADCs just magically don't ever saturate and turn over from + ADC channels to exactly 0 with the switch from negative to positive voltage
        • Somehow pedestal is exactly the maximum value possible in the ADC)
        • Saturation would mean that the large + or - value would encroach into the middle and flatline/saturate at the ~32000 ADC channel range (QWeak ADCs do some weird offset to use their full range I guess)
    • QWeak ADC (only one in LHRS) - vqwk5 (in control.db) - testing all channels with one simple ramp with no features - run number 4090
      • Using "./runpan 4090 maxevents 9000"
      • First channel (channel 0) - 0 to 1200 events - good (labeling the channels by their PAN data labels, not the numbers on the crate - add +1 for those numbers - starting from the bottom and working up)
      • Run 4090 - Channel 1 - 1200-2400 events - good
      • Run 4090 - Channel 2 - 2400-3500 events - good
      • Run 4090 - Channel 3 - 3500-4600 events - good
      • Run 4090 - Channel 4 - 4600-5700 events - good
      • Run 4090 - Channel 5 - 5700-6700 events - good
      • Run 4090 - Channel 6 - 6700-7700 events - good
      • Run 4090 - Channel 7 - 7700-9000 events - good
    • QWeak ADC 0 in RHRS (left most one in the crate) - vqwk6 (in control.db) - similar to LHRS case - run number 4091 and 4092 (written "1" on the bottom label)
      • Run 4091 - Channel 0 - 0-1000 events - good
      • Run 4092 - Channel 1 - 0-1200 events - good
      • Run 4092 - Channel 2 - 1200-2400 events - good
      • Run 4092 - Channel 3 - 2400-3500 events - good
      • Run 4092 - Channel 4 - 3500-4900 events - bad - has absolutely no signal, and has tape over it - should be condemned
      • Run 4092 - Channel 5 - 4900-6200 events - bad - positive voltage range has non-linearities, and pedestal is at 0 instead of +limit - should be condemned
      • Run 4092 - Channel 6 - 6200-7300 events - good
      • Run 4092 - Channel 7 - 7300-8500 events - good
    • QWeak ADC 1 in RHRS (second one, its on the right in the crate) - vqwk7 (in control.db) - run number 4093 (written "29" on the bottom label)
      • Run 4093 - Channel 0 - 0-1100 events - good
      • Run 4093 - Channel 1 - 1100-2200 events - good - pedestal is low instead of high, possibly because a channel was plugged in at time of data taking
      • Run 4093 - Channel 2 - 2300-3400 events - good
      • Run 4093 - Channel 3 - 3400-4500 events - good
      • Run 4093 - Channel 4 - 4500-5800 events - good
      • Run 4093 - Channel 5 - 5800-6900 events - good - pedestal is low instead of high, possibly because a channel was plugged in at time of data taking
      • Run 4093 - Channel 6 - 6900-7800 events - good
      • Run 4093 - Channel 7 - 7800-8900 events - good - pedestal is low instead of high, possibly because a channel was plugged in at time of data taking
  • We re-ran the flat RJ45 cable from the RHRS TS output down the detector hut - tied it off in multiple places and provided some slack (unhook from power box to get more slack) - run 4095 shows first half dead (cable inserted upside down) and second half good (corrected cable)

Result

To Do

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