DAQ Testing/20180730

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July 30th, 2018 Testers: Cameron and Chandan

See Today's Meeting Notes

Goals

Figure out why the last few ADCs in the Counting House crate are giving strange signals

• Was it user error, plugging channels in the wrong places? - some was, still crosstalks on same board
• Are the neighboring channels experiencing cross talk? - yes, investigate more after lunch
• Are the neighboring channels hard wired in a strange way? - maybe, may be software instead
• Is the neighboring board (4) connected via VME backplane (to 3)? - no, probably just user error - note this in prior day run logs
• Is this intentional? - Caryn had set the vqwk# initialization in the boot script instead of the .crl file... - no, why would you sabotage your ADCs like this?

Test a backup QWeak ADC to see if the crosstalk/mislabeled ADC channels are hardware or software

• Replace vqwk3 with replacement and do dedicated runs for each channel and compare all signals

Understanding ADCs in PAN

• Testing Qweak ADCs to understand strange channel mapping and crosstalk
  • vqwk3 (board 4) - channel 0 - run 4107 -
    • Signal shows up in channels 0 and 1, channel 0 is 0.25 times the signal in channel 1
    • Neighboring vqwk4 doesn't see any crosstalk from vqwk3 - so that was some user error
  • vqwk3 (board 4) - channel 1 - run 4108 -
    • Signal shows up in channels 2 and 3, channel 3 is 0.25 times the signal in channel 2
    • The first 4 channels are doubled, top 5 channels are dead
• After Lunch: Take all wires out and test the board (vqwk3) with no extra signals in it - to see if the cross-talk/multiplied channel problem is hardware or software
  • Run 4109 has all extra signal wires unplugged, replaced the EXT Gate trigger wire, plugged
    • Run 4109 - 0-1200 events - Ramp in channel 0 (expect signal in 0 and 1 if error persists)
    • Run 4109 - 1200-2600 events - Ramp in channel 1 (expect signal in 2 and 3 if error persists)
    • Problem persists - channels are coupled strangely still
• Replace QWeak ADC in 4th sloth (index 0, vqwk3) with a replacement board to see if it was a hardware or software problem
  • The old vqwk3 board has a strange device attached to it (see image - left is old, right is replacement)
  • Run 4110 has new board (labelled "24")
    • Run 4110 - 1200 events - Ramp in channel 0 (expect signal in 0 and 1 if error persists in VME crate or software)
      • Error persists, channel 0 input still affects 0 and 1
    • Run 4112 (4111 empty) - 1200 events - Changed trigger source - Ramp in channel 0 (expect signal in 0 and 1 if error persists in VME crate or software)
      • Error persists, channel 0 input still affects 0 and 1
    • Run 4113 - Returned trigger source to original configuration - Ramp in channel 1 (expect signal in 2 and 3 if error persists in VME crate or software)
      • Error persists, channel 0 input still affects 2 and 3
      • Probably the case is that the VME backplane is messed up or there is a software issue
• Move new (still crosstalking) vqwk3 board one VME slot to the left (this VME slot doesn't click into place - probably has more issues)
  • Run 4114 has new board in new slot to the left of original slot
    • Run 4114 - 1400 events - Ramp in channel 0 (expect signal in 0 and 1 if error persists - not in specific VME slot, but in software or entire VME board)
      • The VME slot works - data comes
      • Error persists, channel 0 input still affects 0 and 1
    • Run 4115 - 1700 events - Ramp in channel 1 (expect signal in 2 and 3 if error persists - not in specific VME slot, but in software or entire VME board)
      • The VME slot works - data comes
      • Error persists, channel 1 input still affects 2 and 3
• Looking at ~/bpan18/pan/control.db
  • There is a serious problem - the vqwk3 and 4 regions are not incrementing the data map correctly (when comparing to the RHRS or other Counting House DAQ maps)
  • The jump from one ADC to the next was not implemented correctly
    • last number of one should be the first number of the next
    • But we saw that there was a difference of 1 jump between them
    • start and stop memory address numbers should be off by 1 as well
    • We edit the control.db file (made a backup at control_Backup.db) to correct the memory addressing mistyped numbers (were iterating by +1 always, skipping the +4s that needed to be there
    • Reanalyzing run 4115 with "./runpan 4115" fixes the problem entirely (channels indexed 4 and 5 have strangely split pedestals)
    • So the additional QWeak ADC (written labelled = "24") works in the new slot (except index channels 4 and 5 with weird pedestals)
    • we should still check its dynamic range response, and reinsert the channels

Testing Counting House ADCs

• Re-analyzing yesterday's run for vqwk3 (second to last one in the crate - PAN data map had issues before)
  • Run 4102
    • All channels on this QWeak ADC are fine
• Re-analyzing yesterday's run for vqwk4 (last one in the crate - PAN data map had issues before)
  • Runs 4103 and 4104
    • Only first 4 channels are fine
    • Channel 5 has extra weird non-linear behavior
• We replaced vqwk3 (the 4th one in the crate) because we thought it had problems - it didn't, but we are keeping it replaced for now
  • Test new vqwk3 (labelled "24")
    • Run 4116 - Ramp 16 bit DAC
      • Run 4116 - Channel 0 - events 0 - 2000 - all good
      • Run 4116 - Channel 1 - events 2000 - 3200 - all good
      • Run 4116 - Channel 2 - events 3400 - 4500 - all good
      • Run 4116 - Channel 3 - events 4600 - 5700 - all good
      • Run 4116 - Channel 4 - events 5800 - 6900 - all good
      • Run 4116 - Channel 5 - events 7000 - 8100 - all good
      • Run 4116 - Channel 6 - events 8200 - 9300 - all good
      • Run 4116 - Channel 7 - events 9400 - 10500 - all good
• Testing Counting House HAPPEX ADCs now
  • To test in Counting House and avoid the .crl setting gains segfault problem we just assume int = 3 and conv = 2 gains are sufficient and work from there (set to 3, 3 in order to make sure that the high range is safe, and set to 3, 2 after testing)
  • Test adcx0 (first board of four, on the left of the crate)
    • Run 4117 - Ramp 12 bit DAC
      • Run 4117 - Channel 3 - events 0 - 2000 - fine
      • Run 4117 - Channel 2 - events 2000 - 4000 - fine
      • Run 4117 - Channel 1 - events 4300 - 6000 - fine
      • Run 4117 - Channel 0 - events 6000 - 8000 - fine
  • Test adcx1 (second board of four, on the left of the crate)
    • Run 4118 - Ramp 12 bit DAC
      • Run 4118 - Channel 0 - events 0 - 1000 - fine
      • Run 4118 - Channel 1 - events 1000 - 2000 - fine
      • Run 4118 - Channel 2 - events 2000 - 3000 - fine
      • Run 4118 - Channel 3 - events 3000 - 4000 - fine
  • Test adcx2 (third board of four, on the right of the crate)
    • Run 4119 - Ramp 12 bit DAC
      • Run 4119 - Channel 0 - events 0 - 700 - fine
      • Run 4119 - Channel 1 - events 800 - 2200 - fine
      • Run 4119 - Channel 2 - events 2300 - 3200 - fine
      • Run 4119 - Channel 3 - events 3300 - 4000 - fine
  • Test adcx3 (fourth board of four, on the right of the crate)
    • Run 4120 - Ramp 12 bit DAC
      • Run 4120 - Channel 0 - events 0 - 400 - 3, 3 saturates at 5 Volts - try again with lower gain
      • Run 4120 - Channel 1 - events 500 - 1400 - fine
      • Run 4120 - Channel 2 - events 1600 - 2400 - fine
      • Run 4120 - Channel 3 - events 2500 - 3300 - fine
    • Run 4121 - Ramp 12 bit DAC - setting conv gain down one lower to = 2 instead of 3
      • Run 4121 - Channel 0 - events 0 - 900 - previous high gain setting - maybe fine (could be some other glitch in the crl?)
      • Run 4121 - Channel 0 - events 1000 - 2000 - new lower gains setting - no saturation of 5V signal - fine

Counting House Parity DAQ Fan

• Chandan noticed that the Parity DAQ, especially next to the main ROC 23, was very hot
• Poking the fans with a zip-tie and looking carefully we saw that the left-most fan was not spinning
• Bob has asked Bill Gunning to take a look at and fix the left-most fan on the ROC23 crate - He said he'd take care of it

• UPDATE (9/11/2018): Chuck Long says that the fan module has been replaced, and he also says that often the fans are merely stuck and can be restored by jiggling them

Result

• HAPPEX ADCs
  • All are completely fine for int gain = 3 and conv gain = 2
• QWeak ADCs
  • Many channels have problems, and we fixed a control.db database data map error
  • New vqwk3 is all fine
  • Old vqwk4 is fine for first 4 channels, bad for last 4
• ROC 23 will get some cooling support soon hopefully

To Do

• Add HAPPEX Timing Board to Injector
• Test all ADCs in Injector
• Make a bank for all ADCs