Difference between revisions of "DAQ Testing/20190213"
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| − | [https://ace.phys.virginia.edu:80/HAPPEX/3619 HAPLOG 3619] describes BPM 8 test with new ADC in CH crate | + | Back to [[Main_Page|Main Page]] >> [[DAQ_Doc_Portal|DAQ Documentation Portal]] >> [[DAQ_Testing|DAQ Testing]] >> [[DAQ_Commissioning_Notes|DAQ Commissioning Notes]] |
| + | |||
| + | [[DAQ_Testing/20190212|Previous Day of Testing]] << >> [[DAQ_Testing/20190214|Next Day of Testing]] | ||
| + | |||
| + | February 13th, 2019 | ||
| + | Testers: Cameron Clarke, Ye Tian, Chris Cuevas | ||
| + | |||
| + | == Goals == | ||
| + | |||
| + | * Understand Helicity Control Board issues | ||
| + | * Establish a standard QWeak ADC Testing Procedure with TEDf test stand and Electronics Group Lab View + Oscopes | ||
| + | |||
| + | == Helicity control board updates == | ||
| + | |||
| + | Cameron talked with Roger Flood today after understanding the difference in old vs. new firmware that Kyle Hesse helped us understand yesterday. | ||
| + | |||
| + | == ADC Testing == | ||
| + | |||
| + | Ye Tian and Cameron Clarke met with Chris Cuevas and another electronics group engineer to discuss the steps for getting a ADC repairing pipeline in place. Chris expressed optimism that they can develop an oscope, LRC, tester, and Lab View setup to test hardware components, and then we gave them a tour of the TEDf test stand (as described yesterday). We will log bad boards and upload plots and descriptions of problems to: https://misportal.jlab.org/mis/apps/peer/submit.cfm | ||
| + | |||
| + | * Run 1654 - testing a board to replace CH "vqwk1" "bad" board | ||
| + | ** [[:media:1654-Plots-ADC-MDBKG-Good.pdf|Plots]] | ||
| + | ** It works, this board can be used - has label on top "MDBKG" | ||
| + | ** This board is then used to replace the board in CH "vqwk1" and Tao has taken data to establish pedestals | ||
| + | ** [https://ace.phys.virginia.edu:80/HAPPEX/3619 HAPLOG 3619] describes BPM 8 test with new ADC in CH crate | ||
| + | ** run 1233 and 1234 were used to test (run 1233 had address conflict, so ignore) | ||
| + | * Run 1655 - A board that was laying around, board 26 | ||
| + | ** [[:media:1655-Plots-ADC-26-Good.pdf|Plots]] | ||
| + | ** It works | ||
| + | * Run 1656 - testing original CH "vqwk1" "bad" board (top 4 channels are bad, ch's 4-7). | ||
| + | ** [[:media:1656-Plots-ADC-20-Good.pdf|Plots]] | ||
| + | ** Top 4 channels are bad, as seen in CH crate data | ||
| + | |||
| + | |||
| + | [[Category:DAQ_Testing]] | ||
Revision as of 16:43, 13 February 2019
Back to Main Page >> DAQ Documentation Portal >> DAQ Testing >> DAQ Commissioning Notes
Previous Day of Testing << >> Next Day of Testing
February 13th, 2019 Testers: Cameron Clarke, Ye Tian, Chris Cuevas
Goals
- Understand Helicity Control Board issues
- Establish a standard QWeak ADC Testing Procedure with TEDf test stand and Electronics Group Lab View + Oscopes
Helicity control board updates
Cameron talked with Roger Flood today after understanding the difference in old vs. new firmware that Kyle Hesse helped us understand yesterday.
ADC Testing
Ye Tian and Cameron Clarke met with Chris Cuevas and another electronics group engineer to discuss the steps for getting a ADC repairing pipeline in place. Chris expressed optimism that they can develop an oscope, LRC, tester, and Lab View setup to test hardware components, and then we gave them a tour of the TEDf test stand (as described yesterday). We will log bad boards and upload plots and descriptions of problems to: https://misportal.jlab.org/mis/apps/peer/submit.cfm
- Run 1654 - testing a board to replace CH "vqwk1" "bad" board
- Plots
- It works, this board can be used - has label on top "MDBKG"
- This board is then used to replace the board in CH "vqwk1" and Tao has taken data to establish pedestals
- HAPLOG 3619 describes BPM 8 test with new ADC in CH crate
- run 1233 and 1234 were used to test (run 1233 had address conflict, so ignore)
- Run 1655 - A board that was laying around, board 26
- Plots
- It works
- Run 1656 - testing original CH "vqwk1" "bad" board (top 4 channels are bad, ch's 4-7).
- Plots
- Top 4 channels are bad, as seen in CH crate data
