Difference between revisions of "TEDf-VQWK-Testing"
From PREX Wiki
Jump to navigationJump to search| Line 24: | Line 24: | ||
** Channel 3 works only in positive voltage range | ** Channel 3 works only in positive voltage range | ||
** No Japan error codes are reported | ** No Japan error codes are reported | ||
| − | + | * Run 1659 - test ADC 32 - used wrong HW address, no ACC light blinking and many VQWK read errors on telnet session | |
| + | * Run 1660-1662 - test ADC 32 - corrected HW address (needs to be 0x8400) | ||
| + | ** [[:media:1660-Plots-ADC-32-Bad.pdf|Plots for first 6 channels tested]], [[:media:1661-Plots-ADC-32-Bad.pdf|Plots for intermediate test run to remove VQWK read errors]], [[:media:1662-Plots-ADC-32-Bad.pdf|Plots for post-reboot run with no signals at all (also no Japan error codes)]] | ||
| + | ** So it looks like all 8 channels are bad, and halfway through the run something broke even more | ||
| + | *** At about event 11000 vqwk read error messages started streaming on the telnet session after I plugged ramp DAC into channel 5 (6th on the board) | ||
| + | *** I started a new run to clear read error messages, that didn't fix, so I rebooted, and after rebooting the data is clear - no signal/analog output from ADC channels | ||
| + | ** I removed the board and marked it as dead | ||
| + | * Run 1663 - test ADC 33 - ISU backup board | ||
| + | ** | ||
[[Category:DAQ_Testing]] | [[Category:DAQ_Testing]] | ||
Revision as of 19:35, 14 February 2019
Back to Main Page >> DAQ Documentation Portal >> DAQ Testing
We will log bad boards and upload plots and descriptions of problems to: https://misportal.jlab.org/mis/apps/peer/submit.cfm
- Run 1654 - testing a board to replace CH "vqwk1" "bad" board
- Plots
- It works, this board can be used - has label on top "MDBKG"
- This board is then used to replace the board in CH "vqwk1" and Tao has taken data to establish pedestals
- HAPLOG 3619 describes BPM 8 test with new ADC in CH crate
- run 1233 and 1234 were used to test (run 1233 had address conflict, so ignore)
- Run 1655 - A board that was laying around, board 26
- Plots
- It works
- Run 1656 - testing original CH "vqwk1" "bad" board (top 4 channels are bad, ch's 4-7).
- Plots
- Top 4 channels are bad, as seen in CH crate data
- Run 1657 - test ADC 15, the one with the strangely wired and tied on Op Amp
- Plots
- Works
- Run 1658 - test ADC 37 - ISU board that has recently had new channels go bad on it
- Plots
- Bad channels 2, 3, 4
- Channels 2 and 4 are highly non-linear, basically flat lines offset from pedestal
- Channel 3 works only in positive voltage range
- No Japan error codes are reported
- Run 1659 - test ADC 32 - used wrong HW address, no ACC light blinking and many VQWK read errors on telnet session
- Run 1660-1662 - test ADC 32 - corrected HW address (needs to be 0x8400)
- Plots for first 6 channels tested, Plots for intermediate test run to remove VQWK read errors, Plots for post-reboot run with no signals at all (also no Japan error codes)
- So it looks like all 8 channels are bad, and halfway through the run something broke even more
- At about event 11000 vqwk read error messages started streaming on the telnet session after I plugged ramp DAC into channel 5 (6th on the board)
- I started a new run to clear read error messages, that didn't fix, so I rebooted, and after rebooting the data is clear - no signal/analog output from ADC channels
- I removed the board and marked it as dead
- Run 1663 - test ADC 33 - ISU backup board
